AFBR-S50 API Reference Manual v1.5.6
AFBR-S50 Time-of-Flight Sensor SDK for Embedded Software
Loading...
Searching...
No Matches
argus_hal_test.h
Go to the documentation of this file.
1/*************************************************************************/
37#ifndef ARGUS_HAL_TEST_H
38#define ARGUS_HAL_TEST_H
39
40/*!***************************************************************************
41 * @defgroup argus_test HAL Self Test
42 * @ingroup argus
43 *
44 * @brief A test module to verify implementation of the HAL.
45 *
46 * @details A series of automated tests that can be executed on the target
47 * platform in order to verify the implementation of the HAL that
48 * are required by the API.
49 *
50 * See #Argus_VerifyHALImplementation for a detailed documentation.
51 *
52 * @addtogroup argus_test
53 * @{
54 *****************************************************************************/
55
56#include "argus.h"
57
58/*!***************************************************************************
59 * @brief Version number of the HAL Self Test.
60 *
61 * @details Changes:
62 * * v1.0:
63 * - Initial release.
64 * * v1.1:
65 * - Added additional print output.
66 * - Increased tolerance for timer test to 3%.
67 * - Fixed callback issue by disabling it after IRQ test.
68 * * v1.2:
69 * - Added PIT test cases.
70 * * v1.3:
71 * - Added test case for SPI maximum data transfer size.
72 * - Added tests for SPI transfers invoked from all IRQ callbacks.
73 * - Added verification of first PIT event occurrence.
74 * - Relaxed PIT pass conditions (0.1% -> 0.5%)
75 * * v1.4:
76 * - Adopted to new multi-device HAL interface of API v1.4.4 release.
77 * - Added verification of SPI callback invocation.
78 * - Updated GPIO interrupt test to verify if delayed interrupt
79 * pending states can be detected via #S2PI_ReadIrqPin.
80 *
81 *****************************************************************************/
82#define HAL_TEST_VERSION "v1.4"
83
84/*!***************************************************************************
85 * @brief Executes a series of tests in order to verify the HAL implementation.
86 *
87 * @details A series of automated tests are executed on the target platform in
88 * order to verify the implementation of the HAL that are required by
89 * the API.
90 *
91 * Each test will write an error description via the print (i.e. UART)
92 * function that shows what went wrong. Also an corresponding status is
93 * returned in case no print functionality is available.
94 *
95 * The following tests are executed:
96 *
97 * **1) Timer Plausibility Test:**
98 *
99 * Rudimentary tests of the lifetime counter (LTC) implementation.
100 * This verifies that the LTC is running by checking if the returned
101 * values of two consecutive calls to the #Timer_GetCounterValue
102 * function are ascending. An artificial delay using the NOP operation
103 * is induced such that the timer is not read to fast.
104 *
105 * **2) Timer Wraparound Test:**
106 *
107 * The LTC values must wrap from 999999 µs to 0 µs and increase the
108 * seconds counter accordingly. This test verifies the correct wrapping
109 * by consecutively calling the #Timer_GetCounterValue function until
110 * at least 2 wraparound events have been occurred.
111 *
112 * **3) SPI Connection Test:**
113 *
114 * This test verifies the basic functionality of the SPI interface.
115 * The test utilizes the devices laser pattern register, which can
116 * be freely programmed by any 128-bit pattern. Thus, it writes a byte
117 * sequence and reads back the written values on the consecutive SPI
118 * access.
119 *
120 * **4) SPI Maximum Data Length Test**:
121 *
122 * This test verifies the maximum data transfer length of the SPI
123 * interface. The test sends and receives up to 396 data bytes plus
124 * a single address byte over the SPI interface and verifies that no
125 * data get lost.
126 *
127 * **5) SPI Interrupt Test:**
128 *
129 * This test verifies the correct implementation of the device
130 * integration finished interrupt callback. Therefore it configures
131 * the device with a minimal setup to run a pseudo measurement that
132 * does not emit any laser light.
133 *
134 * Note that this test does verify the GPIO interrupt that occurs
135 * whenever the device has finished the integration/measurement and
136 * new data is waiting to be read from the device. This does not test
137 * the interrupt that is triggered when the SPI transfer has finished.
138 *
139 * The data ready interrupt implies two S2PI layer functions that
140 * are tested in this test: The #S2PI_SetIrqCallback function installs
141 * a callback function that is invoked whenever the IRQ occurs.
142 * The IRQ can be delayed due to higher priority task, e.g. from the
143 * user code. It is essential for the laser safety timeout algorithm
144 * to determine the device ready signal as fast as possible, another
145 * method is implemented to read if the IRQ is pending but the
146 * callback has not been reset yet. This is what the #S2PI_ReadIrqPin
147 * function is for.
148 *
149 * **6) GPIO Mode Test:**
150 *
151 * This test verifies the GPIO mode of the S2PI HAL module. This is
152 * done by leveraging the EEPROM readout sequence that accesses the
153 * devices EEPROM via a software protocol that depends on the GPIO
154 * mode.
155 *
156 * This the requires several steps, most of them are already verified
157 * in previous tests:
158 *
159 * - Basic device configuration and enable EEPROM.
160 * - Read EERPOM via GPIO mode and apply Hamming weight.
161 * - Repeat several times (to eliminate random readout issues).
162 * - Decode the EEPROM (using EEPROM_Decode in argus_cal_eeprom.c).
163 * - Check if Module Number and Chip ID is not 0.
164 *
165 * **7) Timer Test for Lifetime Counter:**
166 *
167 * The test verifies the lifetime counter timer HAL implementation by
168 * comparing the timings to the AFBR-S50 device as a reference.
169 * Therefore several measurement are executed on the device, each with
170 * a different averaging sample count. The elapsed time increases
171 * linearly with the number of averaging samples. In order to remove
172 * the time for software/setup, a linear regression fit is applied to
173 * the measurement results and only the slope is considered for the
174 * result. A delta of 102.4 microseconds per sample is expected.
175 * If the measured delta per sample is within an specified error range,
176 * the timer implementation is considered correct.
177 *
178 * **8) Timer Test for Periodic Interrupt Timer (optional):**
179 *
180 * The test verifies the correct implementation of the periodic
181 * interrupt timer (PIT). It sets different intervals and waits for
182 * a certain number of interrupts to happen. Each interrupt event
183 * is counted and the time between the first and the last interrupt
184 * is measured. Finally, the measured interval is compared to the
185 * expectations.
186 *
187 * Note that this test is only executed if the PIT is actually
188 * implemented. Otherwise, the test is skipped.
189 *
190 * **9) SPI Transfer from Interrupt Callback Test:**
191 *
192 * The test verifies that the #S2PI_TransferFrame method of the
193 * S2PI layer can be invoked from a interrupt callback function too.
194 * Thus, it repeats the S2PI Connection Test but this time from
195 * different interrupt callback functions:
196 *
197 * - SPI Callback: The first transfer is invoked from thread level,
198 * the second transfer is invoke from the SPI interrupt callback
199 * function.
200 *
201 * - GPIO Callback: The device is setup to trigger an GPIO interrupt
202 * (see also the SPI Interrupt Test). The corresponding GPIO
203 * interrupt callback function will trigger the first transfer while
204 * the second one is triggered from the SPI callback function.
205 *
206 * - PIT Callback (optional): This test is only executed optional if
207 * the PIT interface is implemented. The test sequence is the same
208 * as for the GPIO callback, but the first transfer is triggered
209 * from the PIT callback function.
210 *
211 * @note See #HAL_TEST_VERSION for a version history and change log of
212 * the HAL self tests.
213 *
214 * @param spi_slave The SPI hardware slave, i.e. the specified CS and IRQ
215 * lines. This is actually just a number that is passed
216 * to the SPI interface to distinct for multiple SPI slave
217 * devices. Note that the slave must be not equal to 0,
218 * since is reserved for error handling.
219 *
220 * @return Returns the \link #status_t status\endlink (#STATUS_OK on success).
221 *****************************************************************************/
223
225#endif /* ARGUS_HAL_TEST_H */
This file is part of the AFBR-S50 API.
int32_t s2pi_slave_t
Definition argus_api.h:67
int32_t status_t
Type used for all status and error return values.
Definition argus_status.h:70
status_t Argus_VerifyHALImplementation(s2pi_slave_t spi_slave)
Executes a series of tests in order to verify the HAL implementation.
Definition argus_hal_test.c:103